Low-power Analog Image Processing Using Transform Imagers

We introduce our Transform Imager Technology and Architecture. This approach allows for Retina and higher-level bio-inspired computation in a programmable architecture that still possesses similar high-fill factor pixels of APS imagers. This imager is capable of programmable matrix operations on the image, where we can represent the image as either a full matrix or using block matrix operations. The resulting data-flow architecture directly allows computation of spatial transforms, motion computations, and stereo computations. The core imager performs computation at the pixel plane, but still holds to a fill factor greater than 40 percent. Each pixel is composed of a photodiode sensor element and a multiplier. We introduce our Transform Imager Technology and Architecture. This approach allows for Retina and higher-level bio-inspired computation in a programmable architecture that still possesses similar high-fill factor pixels of CMOS imagers. Figure 1 shows the block diagram of our Transform imagers. If the incoming voltages represent functions in time, particularly transform bases like sine and cosine, then we are performing computations analogous to matrix image transforms. The output is a continuous stream of each row of the transformed image, repeated over a desired fundamental frequency. This approach is enabled by floatinggate circuits [2], in storing arbitrary analog waveforms for image transforms, in programming waveforms to account for average device mismatch, and in computing additional matrix-vector computations. We present our approach in the following sections. In Section 1, we describe our transform imager concepts. This imager is capable of programmable matrix operations on the image, where we can represent the image as either a full matrix or using block matrix operations. In Section 2, we present the resulting data-flow architecture for image processing built around this transform imager. In Section 3, we discuss some circuit specific issues to the overall signal processing of the basic Transform imager. 1. TRANSFORM IMAGER COMPUTATION Our transform imager cell performs computation at the pixel plane, but still holds to a fill factor greater than 40%, and allows for retina and advanced biological-type processing. Therefore, we have the best of both worlds in a single architecture. This imager is capable of programmable matrix operations on the image, where we can represent the image Image Elements Floating-Gate Element Analog Computing Array Transformed Output Image Iout Vin Basis Functions Fig. 1. Top view of our matrix transform imager. The image output rate will be the same as the time to scan a given image; then the resulting image transfer rate is significantly reduced if information is refined. Approach allows arbitrary separable matrix image transforms; these transforms are programmable because we use floating-gate circuits. Voltage inputs from various time bases are broadcast along columns, and output currents are summed along lines on each row. Each pixel processor multiplies the imconing input with the measured image sensor result, and outputs a current of this result. Time basis could be oscillators, pattern generating circuits, or arrays or stored analog values (i.e. floating-gate storage). With can compute block image transforms with smaller time bases, digital control, and smaller block matrices for block image transforms. Finally, we can get multiple parallel results, since all of the matrix transforms could operate on the same image flow. as either a full matrix or using block matrix operations. The pixel for the Transform imager has a fill factor greater than 40%, which allows for retina and advanced biological-type processing, in a programable architecture that still preserves the overall high fill-factor of APS imager for the pixels. This Transform imager can compute arbitrary separable matrix transforms. We perform separable matrix transforms as